According to double stable circuit which is constructed by two SET inverters, three R-S flip-flops are presented, and then putting forward D flip-flop. 在对由SET反相器构成的双稳态电路进行分析的基础上,提出了3种R_S触发器,最终得出了D触发器。
In 1998, a new concept Or-memory gate [ 1] is proposed. It supposed that just one gate is possible to structure an R-S flip-flop. 1998年,文献[1]提出了或记论的的概念,提出一个基本RS触发器只要用一个或记门(即普通的与门域门)就可以实现。
The simulation results show that just one gate is possible to structure an R-S flip-flop with proper technical conditions. 仿真结果表明,只要工艺条件得当,用一个门实现电路记忆对于类似RS触发器这样的简单电路是完全可行的。